Digital Logic and Computer Design 2016 – BSc Computer Science Part 1

Paper Code: 1305
1505
B.Sc. (Computer Science) (Part 1)
Examination, 2016
Paper No. 2.2
DIGITAL LOGIC AND COMPUTER DESIGN

Time: Three Hours] [Maximum Marks: 33

 

Note: Attempt five questions in all. Select one question from each Section.

Section-A

1. (a) Realize AND gate using NOR gates only.

(b) Using Boolean algebraic theorems, prove that:

2. (a) Explain static RAM and dynamic RAM.

(b) What are error detecting and correcting codes?

Section-B

3. (a) Briefly describe the following:

1. Decimal Adder
2. Encoder

(b) What is binary multiplier? Draw and explain 2 to 4 line decoder.

4. (a) Discuss the race around condition and its solution.

(b) Explain structure of 4 byte diode ROM.

Section-C

5. (a) Draw and explain the bloc diagram of asynchronous sequential circuit.

(b) Draw the circuit diagram of mod-5 counter and convert it into decade counter.

6. (a) Comparison between PROM, PLA and PAL.

(b) Explain the hazard in combinational and sequential circuit.

Section-D

7. (a) Draw and write the expression for 4 bit parallel subtractor using full adder?

(b) What are the advantages of CMOS memory chip over bipolar memory chip?

8. (a) Implement the following Boolean function using 8 : 1 multiplexer?

(b) Design 4 bit ripple counter using suitable transmission can be detected using parity bit.

9. (a) Explain, how error occurred in data transmission can be detected using parity bit.

(b) Convert J-K flip-flop using block diagram.

10. Explain any two of the following:

1. Flip-Flop propagation delay
2. Look ahead carry adder
3. D Flip-Flop
4. BCD to seven-segment decoder

……………End……………